Electrostatic discharge (ESD) testing is utilized worldwide by electronics manufactures and includes the use of numerous standards from organizations including the American National Standards Institute (ANSI), JEDEC, and International Electrotechnical Commission (IEC), among others. ESD testing requires the use of many hardware prototypes, which is time consuming and expensive. The ability to simulate the ESD testing process and pinpoint locations in wireless devices susceptible to ESD damage would be extremely valuable and allow engineers to reduce the number of prototypes required to design products for minimal ESD damage.
This presentation from the 2019 IEEE MTT-S NEMO conference summarizes a number of ESD simulation features in XFdtd. Engineers using XFdtd can utilize ESD simulator waveforms, define the dielectric strength of materials, and easily locate weaknesses in their ESD design. Additionally, electronic circuit components within an XFdtd simulation are monitored for overvoltages and overcurrents. Components which exceed their rated design parameters are subject to permanent damage and are reported by XFdtd to the engineer.
XFdtd’s collection of ESD simulation features provides ESD engineers with a valuable tool which can be utilized to optimize ESD protection during the design phase, thus reducing ESD failures during manufacturing and warranty claims after purchase.